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| [23] | The FMCAD 2016 graduate student forum. 16th Conference on Formal Methods in Computer-Aided Design (FMCAD). 2016. [ bib | http | Abstract ] |
| [22] | Optimizing horn solvers for network repair. 16th Conference on Formal Methods in Computer-Aided Design (FMCAD). 2016. [ bib | http | Abstract ] |
| [21] | Event-driven network programming. 37th annual ACM SIGPLAN conference on Programming Language Design and Implementation (PLDI). 2016. [ bib | http | Abstract ] |
| [20] | Efficient Synthesis of Network Updates. 36th annual ACM SIGPLAN conference on Programming Language Design and Implementation (PLDI). 2015. [ bib | Abstract ] |
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| [18] | Network Updates for the Impatient: Eliminating Unnecessary Waits. 1st Workshop on PL and Verification Technology for Networking. 2015. [ bib ] |
| [17] | On recursion-free Horn clauses and Craig interpolation. Formal Methods in System Design. 2014. [ bib | http | Abstract ] |
| [16] | Horn Clauses for Communicating Timed Systems. Workshop on Horn Clauses for Verification and Synthesis (HCVS). 2014. [ bib | Abstract ] |
| [15] | Classifying and Solving Horn Clauses for Verification. 5th Working Conference on Verified Software: Theories, Tools and Experiments (VSTTE). 2013. [ bib | Abstract ] |
| [14] | Disjunctive Interpolants for Horn-Clause Verification. 25th international conference on Computer Aided Verification (CAV). 2013. [ bib | Abstract ] |
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| [12] | A Verification Toolkit for Numerical Transition Systems (Tool Paper). 16th International Symposium on Formal Methods (FM). 2012. [ bib | Abstract ] |
| [11] | Symbolic Execution of Reo Circuits Using Constraint Automata. Science of Computer Programming. 2012. [ bib | http | Abstract ] |
| [10] | Formal Analysis of SystemC Designs in Process Algebra. Fundamenta Informaticae. 2011. [ bib | http | Abstract ] |
| [9] | Automated Analysis of Reo Circuits using Symbolic Execution. 8th International Workshop on the Foundations of Coordination Languages and Software Architectures (FOCLASA). 2009. [ bib | Abstract ] |
| [8] | Application of Process Algebraic Verification and Reduction Techniques to SystemC Designs. Technische Universiteit Eindhoven Technical Report CSR-08-15. 2008. [ bib | Abstract ] |
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| [5] | Integrating Module Checking and Deduction in a Formal Proof for the Perlman Spanning Tree Protocol (STP). J.UCS Journal of Universal Computer Science. 2007. [ bib | http | Abstract ] |
| [4] | Evaluation of part of speech tagging on Persian Text. 2nd Workshop on Computational Approaches to Arabic Script-based Languages (CAASL2). 2007. [ bib | Abstract ] |
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| [2] | Formal verification of the object-based systems using process algebra. Master's Thesis, Tehran University ECE Dep. 2007. [ bib | Abstract ] |
| [1] | Formal Verification of the IEEE 802.1D Spanning Tree Protocol Using Extended Rebeca. 1st IPM International Symposium on Fundamentals of Software Engineering (FSEN). 2006. [ bib | http | Abstract ] |