Computer Organization - Exam 2 Topic List

Exam date: Thursday, April 18, 2013

Important Notes

I will provide you with a handout containing the relevant material from the MIPS reference card found at the front of your textbook to use during this exam. You do not need to bring your own copy of the card.

You are NOT allowed to use a calculator on any questions that specifically ask you to convert numbers from one base to another, unless the calculator is a simple four-function one.

TEXT CHAPTERS

• Chapter 2: Instructions: Language of the Computer
• Chapter 3: Arithmetic for Computers
• Appendix B: Assemblers, Linkers, and the SPIM Simulator
• Appendix C: The Basics of Logic Design (on CD-ROM)

LECTURE NOTES

• Topic 5: Information Representation II: Instructions
• Topic 6: Information Representation III: Floating Point
• Topic 7: Program Translation
• Topic 8: Introduction to Digital Design
• Topic 9: Larger Digital Circuits

TOPICS

Information Representation: Instructions

• concept: instruction set architecture (ISA)
  
  
• assembly language vs. machine language
  • mnemonic form vs. binary
  • assembly statement syntax: label, operation, operands, comment
  
  
• fundamental concept: everything is binary
  • no difference between instructions and data
  • bit patterns have meaning depending on how you use them
  
  
• instruction representation
  • formats: i-type, r-type, j-type
  • fields, field contents
  • operand representation (esp. branch/jump destinations and optimization)
    • optimized representations - low-order two bits are always zero, so don 't represent them
    • branch destination: 16-bit displacement from instruction after branch (effectively, 18-bit displacement)
    • jump destination: 26-bit target address (effectively, 28-bit address)
  • how to choose most appropriate representation

Information Representation: Floating Point

• non-integer numeric values
  • fixed point vs. floating point
  • use scientific notation to represent value
  
  
• MIPS floating point representations
  • normalized vs. denormalized values
  • 32 bits: single precision: sign bit, 8-bit exponent, 23-bit significand
  • 64 bits: double precision: sign bit, 11-bit exponent, 52-bit significand
  • use IEEE 754 floating point standard representations
  • FP operations handled by separate arithmetic hardware
  
  
• critical concept: "meaning" of a sequence of bits depends on how you use it
  • ex: 32-bit value 00110100010100100100100101010100
  • as 32-bit FP value: 1.642863 * 2-23 = 1.958 * 10-7
  • as 32-bit integer: 877,807,956
  • as 32-bit instruction: ori $18,$2,18772
  • as four ASCII characters: 4RIT

Program Structure and Representation

• general concept: converting code from one form to another
  
  
• forms
  • interpreter vs. translator
  • differences between the two (level of abstraction, execution efficiency)
  • when you would use one instead of the other
  
  
• language levels
  • high-level language (HLL)
  • assembly language (ASM)
  • machine language (ML)
  
  
• basic steps and mechanisms
  • HLL -> ASM: compiler
  • ASM -> object module: assembler
  • object module -> load module: linker
  • load module -> running program: loader (part of OS)
  
  
• compilers
  • read HLL programs as input, produce ASM equivalent programs as output
  • basic concepts
  • typical output (directives, instructions, etc.)
  
  
• assemblers
  • read ASM programs as input, produce object modules as output
  • the assembly process
    • analysis phases
      • lexical analysis (scanner) - converts input into sequence of tokens
      • syntax analysis (parser) - verifies validity of token sequences
      • semantic analysis - determines meaning of token sequences
    • tokens
      • concept: uniform symbols representing language elements
      • self-evident: COMMA, COMMENT, etc.
      • generic (require additional information): OP, REG, SYM, etc.
    • data structures used by the assembler
      • location counter (LC)
        • vs. program counter (PC)
      • operation table (OPTAB)
      • directive table (DIRTAB)
    • data structures built/modified by the assembler
      • symbol table (SYMTAB)
      • definition table (DEFTAB)
      • reference table (REFTAB)
      • relocation table (RELTAB)
    • passes
      • typical assembler is a "two-pass" assembler
      • pass 1 tasks
        • build SYMTAB
        • syntax verification
        • (optional) partial translation
        • (optional) intermediate file
        • typical actions for different types of tokens
      • pass 2 tasks
        • final semantic checking
        • final ASM -> ML translation
        • (optional) assembly listing
        • typical actions for different types of tokens
  
  
• program layout in memory
  • program sections (text, data, bss, etc.)
  • global vs. local symbols

Linking and Loading

• object module
  • relocatable vs. absolute modules
  • contents: header, code, reltab, symtab, deftab, reftab
  • example format: ELF (general details only)
  
  
• linkers
  • also called link editors or linkage editors
  • load module vs. object module
  • linking process
  • concept of relocation, load point(s)
  • relocating vs. absolute linkers
  • basic tasks; relocating linker algorithm
  
  
• loaders
  • part of the OS
  • basic tasks
  
  
• libraries
  • concept - archive of precompiled code
  • static vs. dynamic linking
  • shared libraries

Introduction to Digital Design

• use Boolean algebra to describe circuits
  • Boolean operations: AND, OR, NAND, NOR, XOR, NOT
  • use of truth tables to describe functionality
  
  
• deriving Boolean expressions from truth tables
  • variations: Sum of Products, Product of Sums
  • minterms: AND together values of input variables to get result of 1
  • maxterms: OR together values of input variables to get result of 0
  • SP ORs together minterms for which function is 1
  • PS ANDs together maxterms for which function is 0
  • can prove SP and PS forms are equivalent with truth tables
  
  
• manipulating Boolean expressions
  • can use Boolean identities to combine/reduce terms to simplify expressions
    • laws: identity, zero/one, inverse, commutative, associative, distributive, simplification, DeMorgan
  • can reduce terms using Karnaugh Maps (K-maps)
    • concept: convert logical adjacencies in truth table to physical adjacencies
    • can circle groups of adjacent '1' values and derive reduced SP terms from grouping
    • or, can circle groups of adjacent '0' values and derive reduced PS terms from grouping
    • groups are power-of-two in size (2, 4, 8, etc.)
    • size of k-map depends on number of input variables
  
  
• circuit design
  • Boolean operations are implemented using gates
  • implement Boolean expressions as combinations of gates
  • basic gates: AND, OR, Buffer, NOT, NAND, NOR, XOR
  • can do gate substitution by using DeMorgan's Law
    • apply two complements to entire expression
    • carry one of them partway "in" by using DeMorgan's Law
    • SP expression (OR of AND subexpressions) can be implemented using only NAND gates
    • PS expression (AND of OR subexpressions) can be implemented using only NOR gates
  
  
• mixed logic
  • positive logic: low voltage represents logic 0, high voltage is logic 1
  • negative logic: low voltage is logic 1, high voltage is logic 0
  • mixed logic: voltage-to-logic mapping is different at different places in circuit
  • this is what we're doing when we do NAND or NOR subsitution in SP or PS expressions
  • gates are described using voltage tables
  • interpret voltages as either positive (asserted high) or negative (asserted low) logic values

Advanced Digital Design (Part 1)

• two types of circuits:
  • combinational - outputs determined by gates acting on inputs
  • sequential - outputs determined by gates acting on inputs and on previous "state" of circuit
  
  
• common combinational components
  • decoder
    • N inputs, 2^N outputs
    • produces a 1 on one of the outputs according to the N-bit value given as input
    • inverse: encoder, priority encoder
  • multiplexor
    • K select inputs, N data inputs, one output
    • output is one of N data inputs chosen according to the K-bit select input value
    • inverse: demultiplexor
  • programmable logic array (PLA)
    • can implement any SP expression
    • inputs (original and complemented values) are fed to an AND array to produce minterms
    • results from AND array are fed to an OR array to produce SP expressions
    • before programming, all possible AND and OR connections are available
    • "program" by breaking all unwanted connections (fuse style) or making all desired connections (anti-fuse style)
  • read-only memory (ROM)
    • inputs represent an "address"
    • outputs represent "word" contents at that address
    • basically, just a combinational circuit
  
  
• sequential circuits
  • have internal state
  • typically, synchronous components operated by a clock signal
    • clock cycle: complete transition from low voltage to high voltage and back to low voltage
    • frequency of cycling is the clock cycle rate
    • terms: positive/rising edge/level, negative/falling edge/level
  • at heart of sequential circuit is a latch
    • two gates (e.g., NOR) are cross-connected
    • latch maintains a steady state - thus, is a form of memory
    • behavior is determined by its characteristic table
    • can illustrate behavior with a timing diagram
  • when a latch is controlled by a clock, it's called a flip-flop
    • common types: RS, JK, D, T
    • each has a characteristic table describing its behavior
    • concept: master-slave flip-flop; samples input on rising edge of clock cycle, changes outputs on falling edge