Computer Architecture -- Exam 1 Topics


    Chapters 1 & 2, Appendix A, Case Studies (Appendices C-F)

------------------------------------------------------------------------


Review Material

This is material which you should recall from your earlier courses. It
will not be tested specifically, but understanding new material in this
course depends upon your understanding of material from previous courses.


Review - Digital Design:

    * Basic concepts
          o positive, negative, mixed logic
          o combinational vs. sequential circuits
          o analysis vs. synthesis of circuits 
    * Boolean algebra
          o relationship to circuits
          o manipulation with Boolean identities
          o manipulation with Karnaugh maps (K-maps) 
    * Combinational circuits
          o construction from Boolean expressions
          o implementation with programmable logic (PLAs)
          o common forms
                + decoder, encoder
                + multiplexor, demultiplexor
                + read-only memory 
    * Bus implementation
    * Arithmetic and logic circuits
    * Sequential circuits
          o latches and flip-flops
                + common forms - D, T, JK, RS
                + flip-flop characteristic and transition tables 
          o synthesis from state diagrams and/or state tables
          o common types
                + registers
                + counters, sequence generators
                + random-access memory 


Review - Computer Organization:

    * Information representation
          o number systems
          o positional notation
          o conversion between bases
          o representation of:
                + non-numeric information (characters, character set, etc.)
                + integers (signed, unsigned, complement schemes)
                + floating point 
    * Register transfer language (RTL)
          o basic components
          o use of RTL to describe micro-ops
          o sequences of micro-ops to implement instructions 
    * Machine language and assembly language
    * Program translation
    * Data path view of CPU/CU
          o typical register/memory structure
          o consider micro-ops as ``switches'' controlling data flow
          o direct data paths vs. bus-oriented data paths
          o instruction set 
    * Control unit design
          o modulo control sequencer (counter and decoders)
          o microcoded sequencer
                + concepts - micro-CU, control store
                + vertical vs. horizontal microprogramming
                + hybrid microprogramming
                + operation grouping
                + pros and cons 

------------------------------------------------------------------------


New Material


Fundamentals (Chapter 1):

    * background & focus
          o emphasis on quantifiable properties of architecture
          o major components:
                + instruction set design
                + organization/control unit design
                + memory (cache, ``real'') interface 
          o requirements which constrain designers:
                + functional requirements
                + price/performance
                + applications
                + compatability
                + OS requirements
                + market standards (IEEE standards, etc.) 
          o measures of success:
                + low complexity (decreased time-to-market, decreased
                  maintenance)
                + high performance
                + low cost 


    * trends in computer usage & implementation
          o memory usage grows ~150-200%/year (1/2 to 1 bit of address
            space)
            (more high-level-language use -> heavier use of compilers ->
            more low-level code -> higher memory requirements)
          o IC density grows ~50%/year
          o IC die size grows ~10-15%/year
          o # of transistors/chip grows ~60-80%/year
          o RAM density grows ~60%/year; memory cycle time drops ~33%/10
            years
          o disk density grows ~50%/10 years; access times drop ~33%/10
            years 


    * cost & trends in cost
          o terms: wafer, die, IC
          o die cost calculations (when given formulae and specifications)
          o relative costs: CPU ~22% of total machine cost 


    * measuring & reporting performance
          o terms: clock cycle time, insruction count, cycles per
            instruction
          o Amdahl's Law
          o calculating speedup to allow comparisons
          o calculating CPU time based on CPI for types of instructions
          o evaluation methods:
                + toy benchmarks
                + program kernels
                + synthetic benchmarks (Dhrystone, Whetstone)
                + real programs (SPEC)
                + dangers (e.g., Sun ``cooked'' the Java benchmarks) 

    * fallacies & pitfalls
          o MIPS is a valid measure of performance
          o MFLOPS is a valid measure of performance
          o synthetic benchmarks = real programs
          o peak performance allows determination of overall performance 

Computer Organization (notes):

    * Data path view of CPU/CU
          o typical register/memory structure
          o consider micro-ops as ``switches'' controlling data flow
          o direct data paths vs. bus-oriented data paths
          o instruction set 

    * Control unit design
          o modulo control sequencer (counter and decoders)
          o microcoded sequencer
                + concepts - micro-CU, control store
                + vertical vs. horizontal microprogramming
                + hybrid microprogramming
                + operation grouping
                + pros and cons 


Instruction Set Design (Chapter 2):

    * classifying instruction set architectures
          o stack
          o accumulator
          o general-purpose register
                + variations: memory-memory, register-memory,
                  register-register 
          o pros & cons of each type 


    * memory addressing
          o endian-ness of memory (big endian, little endian)
          o alignment issues
          o addressing modes
                + direct/absolute - address held directly in instruction
                + register
                + immediate - variations (literal vs. immediate on VAX)
                + displacement/relative - use with PC to get position
                  independent coding
                + indirect (a.k.a. register deferred)
                + indexed - address is the sum of two registers
                + scaled - base address plus scaled contents of register
                  (VAX: this is called indexed)
                + memory indirect (a.k.a. memory deferred)
                + autoincrement/autodecrement - modify reg contents and
                  use as indirect address; ordering - use/modify,
                  modify/use 
          o dominant modes: immediate & displacement; have extra data in
            instruction sequence -> longer instructions
          o displacement lengths also determine displacement ranges 


    * operations/instructions
          o minimal set: load, store, increment, branch if zero
          o common categories:
                + data movement: load/store/move; reg-reg, reg-mem,
                  mem-mem; i/o; push, pop
                + ALU:
                      # arithmetic - add/sub/mul/div; int vs. floating pt.
                      # logical - and/or/xor/not, bit set/clear
                      # shift - left/right; arithmetic vs. logical;
                        shift vs. rotate
                      # comparison - one operand (TST), two operand (CMP) 
                + control:
                      # unconditional jump/branch
                      # conditional branch
                            * implementations: condition code, condition
                              register, compare-and-branch 
                      # linkage - call/return
                      # interrupt: trap/syscall/svc, return from interrupt 
                + synchronization: test-and-set (atomic)
                + special: string, queue, polynomial, etc. 
          o frequency of use vs. functionality
          o increased functionality -> increased complexity -> increased
            decoding time 

    * operands
          o types & sizes
                + common sizes: byte, halfword, word, etc.
                + encoded in opcode (MOVL, MOVW) vs. specified by a
                  field in the instruction (e.g., one MOV instruction;
                  two-bit field specified byte/halfword/word/etc.) 


    * instruction set encoding
          o basic types: fixed, variable, hybrid
          o considerations:
                + complexity of decoding required
                + opcode length
                + operand count (0, 1, 2, 3 operands?)
                + operand mode specification (register, memory,
                  immediate, etc.)
                + number of registers & how they can be used (e.g., $0
                  on MIPS, R15 == PC on VAX) 


Pipelining (Appendix A) Part 1:

    * basic concepts
    * simple MIPS-like 5-stage pipeline
    * pipeline registers

Case Studies:

    * MIPS: Chapter 2, Appendix C
    * Various RISC: Appendix C
    * x86: Appendix D
    * VAX: Appendix E
    * IBM 360/370: Appendix F 

------------------------------------------------------------------------