4003-520/4005-720 Computer Architecture Spring 20023

What's New

May 18th: Found an error in the answer to Homework 5 question 5.4 In the data cache (both read and write) I was moving 2 words to fill a L1 block from L2. This is incorrect, the data cache only uses 16byte blocks, so it only requires a single L1 <- L2 transfer to move a block.
May 14th: Homework 5 answers are now available
May 1st: Homework 5 is now available
April 27th: Corrected the documentation for the execution of the ANDI, ORI, XORI, SLLI, SRLI, SRAI instructions.
April 21st: Made available the sample d023 executable and a number of test files.
Also made HW 4 available.
April 18th: Added some more documentation about the dlx.
April 14th: Added some more documentation about the execution of instructions in the dlx architecture.
Also added links to Prof. Carithers notes for the 2nd half of the class.
April 9th: Project 2 is available
Corrected a typo in the solution to Homework 2. The destination for line at 510, should goto read at 507, but the answer had read at 508.
April 8th: Solution to Homework 2 is available
April 6th: Due to the ice storm, I will be giving a one day extension on the first Project.
March 31st: fixed a typo in the machine description of the m023. There was an extra not(R) in the complete machine desc. on page 11 for the fetch and decode steps.
March 30th: Homework 3 is available
March 27th: Added the room number where we will be taking our exam.
March 26th: Corrected the date for Exam 1 and added a help session for the exam.
March 24th: Homework 2 is available
March 18th: Project 1 is available
March 11th: Homework 1 is available
March 9th: New quarter

Syllabus

4005-720 Grad Syllabus

4005-720 Research Topic Requirements

4003-520 Under-grad Syllabus

Academic Dishonesty Paper

NOTE I WILL NOT grade, and you will recieve a zero, for all assignment until you have submitted this paper

Academic Dishonesty Paper Requirements

ICSS520 Homework

NOTE all homework is due at the beginning of class.

Homework 1 Due date: Mar. 24
Homework 2 Due date: April 2
To turn in HW 2 you will need the following coding sheets (pulled from the homework to simplify using).
Homework 3 Due date: April 9
Homework 4 Due date: April 30
- Answer sheet for A.1a
Homework 5 Due date: May 12
- Solution for Homework 5 NEW

Projects

NOTES for all projects

all Projects are electronically submitted and are due at 11:59:59pm on the specified date.
A series of tests will be run against your project submission; however, only some of these will be displayed as they are run.
IF YOU INTERRUPT 'try' BEFORE IT COMPLETES, NONE OF YOUR FILES WILL BE SUBMITTED.
You may find Prof. Carithers common project Q/A from previous quarters file to be helpful.

Project 1 Due date: April 8th 2003
Supporting Documentation
- Computer Architecture: The M023 CPU, Document containing the description of the M023 machine.
- NOTE the provided sample object file(s) may not cover all the possible instructions, no less all the possible interesting conditions of the instructions. I highly recommend that you create some of your own files for testing.
Project 2 Due date: May 5th 2003
Supporting Documentation
- A set of DLX architecture and control flow diagrams: PDF
- The DLX instruction set and addressing modes Note that you are not implementing all these instructions.
- FAQ for DLX

Exams

The planned date for exam 1 is during week 6

April 14th

Help session for the exam will be in the CS Conference room (70-3000) April 14th from 5-6pm

The planned date for exam 2 is during finals week?

May 19th

Class Overheads

All overheads are taken from Prof. Carithers class notes

Documents

NOTE, make sure your NAME is on every document and file you send to me.
Refence book for information on control sequencers:
Computer System Architecture 3rd edition by M. Morris Mano, Prentice-Hall Inc. 1993
Specificly look for information in:
- Chapter 5, Basic Computer Organization and Design
- Chapter 7, Microprogrammed Control
Note this book is used by the Computer Organization class (4003-352) so should be available in the bookstore.
Notes about the arch library:
- A simple document describing the structure of the arch library: PostScript, PDF
- C++ Architecture Library documentation produced by Rational Rose is available in HTML and MSWord format.
  For those who want a better view of the relationships between the various classes in the arch2-2 library.
- You may find Prof. Carithers answers to common questions about the arch library to be helpful.
- Prof. Carithers description of the arch library object module format may be useful if you want to build your own test programs.
Computer Architecture: Design Using RTL, an introduction to the use of RTL in design (from 0603-352, Computer Organization)).
Computer Architecture: Microprogrammed Control Units, an introduction to microprogrammed design (from 0603-352, Computer Organization)).
Preparing color transparencies for printing
- The color printer is loaded with transparencies, which are fairly expensive commodities, so it is important that you prepare your slides properly and preview them before printing to avoid waste (and to keep us from having a lab fee!)
WML services: preparing color transparencies
CS 4 standards document for C++.
Note these are only a guideline for how I want your code to look. Specifically I want your code to be neat, clear, and consistant. I'm looking for:

reasonable length functions
program file headers with your name
function and class headers
clear and consistant indentation

Jim Heliotis has a public directory containing a large number of useful files for the "arch" package and this course. The path is:

/usr/local/pub/jeh/Architecture

Beginners guide to high performance computing (some nice definitions). High Performance Computing . A little simple, but it could be useful.

Phil's home Page